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L6590A
FULLY INTEGRATED POWER SUPPLY
s s s s
WIDE-RANGE MAINS OPERATION "ON-CHIP" 700V V(BR)DSS POWER MOS 65 kHz INTERNAL OSCILLATOR STANDBY MODE FOR HIGH EFFICIENCY AT LIGHT LOAD OVERCURRENT AND LATCHED OVERVOLTAGE PROTECTION NON DISSIPATIVE BUILT-IN START-UP CIRCUIT THERMAL SHUTDOWN WITH HYSTERESIS BROWNOUT PROTECTION
s
s
s
MINIDIP ORDERING NUMBER: L6590AN
s s
- HOME APPLIANCES/LIGHTING LINE CARD, DC-DC CONVERTERS
MAIN APPLICATIONS s WALL PLUG POWER SUPPLIES UP TO 15W
s s
DESCRIPTION The L6590A is a monolithic switching regulator designed in BCD OFF-LINE technology, able to operate with wide range input voltage and to deliver up to 15W output power. The internal power switch is a lateral power MOSFET with a typical RDS(on) of 13 and a V(BR)DSS of 700V minimum.
AC-DC ADAPTERS AUXILIARY POWER SUPPLIES FOR: - CRT AND LCD MONITOR (BLUE ANGEL) - DESKTOP PC/SERVER - FAX, TV, LASER PRINTER
TYPICAL APPLICATION CIRCUIT
AC line 88 to 264 Vac
Pout up to 15W
DRAIN
1
BOK
L6590A
5 3
Vcc
6, 7, 8
GND COMP
4
October 2000
1/19
L6590A
DESCRIPTION (continued) The MOSFET is source-grounded, thus it is possible to build flyback, boost and forward converters. The device is meant to work with secondary feedback for tight tolerance of the regulated output voltage. The internal fixed oscillator frequency and the integrated non dissipative start-up generator minimize the external component count and power consumption. The device is equipped with a standby function that automatically reduces the oscillator frequency from 65 to 22 kHz under light load conditions to enhance BLOCK DIAGRAM
DRAIN (1)
START-UP
efficiency (Pin < 1W @ Pout = 0.5W with wide range mains). Internal protections like cycle-by-cycle current limiting, latched output overvoltage protection, mains undervoltage protection and thermal shutdown generate a 'robust' design solution. The IC uses a special leadframe with the ground pins (6, 7 and 8) internally connected in order for heat to be easily removed from the silicon die. An heatsink can then be realized by simply making provision of few cm2 of copper on the PCB. Furthermore, the pin close to the high-voltage one is not connected to ease compliance with safety distances on the PCB.
VCC (3)
THERMAL S.DOWN SUPPLY & UVLO OVER VOLTAGE
+ -
VREF BROWNOUT
+ +
GND (6,7,8)
-
OVER CURRENT PWM
-
BOK (5)
2.5V
STANDBY OSC 65/22 kHz 1 mA
COMP (4)
PIN CONNECTIONS (Top view)
DRAIN N.C. Vcc COMP
GND GND GND BOK
2/19
L6590A
PIN FUNCTIONS
N 1 2 3 Pin DRAIN N.C. Vcc Description Drain connection of the internal power MOSFET. The internal high voltage start-up generator sinks current from this pin. Not internally connected. Provision for clearance on the PCB. Supply pin of the IC. An electrolytic capacitor is connected between this pin and ground. The internal start-up generator charges the capacitor until the voltage reaches the start-up threshold. The PWM is stopped if the voltage at the pin exceeds a certain value. PWM Control Input. The voltage on this pin (VCOMP) controls the PWM modulator: the higher VCOMP, the higher the duty cycle. The pin will be driven by a current sink (usually the transistor of an optocoupler) able to modulate VCOMP by modulating the current. Brownout Protection. If the voltage applied to this pin is lower than 2.5V the PWM is disabled. This pin is typically used for sensing the input voltage of the converter through a resistor divider. If not used, the pin can be either left floating or connected to Vcc through a 15 k resistor. Connection of both the source of the internal MOSFET and the return of the bias current of the IC. Pins connected to the metal frame to facilitate heat dissipation.
4
COMP
5
BOK
6 to 8
GND
THERMAL DATA
Symbol Rthj-amb Rthj-pins Parameter Thermal Resistance Junction-ambient (*) Thermal Resistance Junction-pins Value 35 to 60 15 Unit C/W C/W
(*) Value depending on PCB copper area and thickness.
ABSOLUTE MAXIMUM RATINGS
Symbol Vds Id Vcc Iclamp Drain Source Voltage Drain Current IC Supply Voltage Vcc Zener Current PWM Control Input Sink Current BOK pin Sink Current Ptot Power Dissipation at Tamb < 50C 3 cm2, 2 oz copper dissipating area on PCB Operating Junction Temperature Storage Temperature Parameter Value -0.3 to 700 0.7 18 20 3 1 1.5 Unit V A V mA mA mA W
Tj Tstg
-40 to 150 -40 to 150
C C
3/19
L6590A
ELECTRICAL CHARACTERISTCS (Tj = -25 to 125C, Vcc = 10V; unless otherwise specified))
Symbol POWER SECTION V(BR)DSS Drain Source Voltage Idss RDS(on) Off state drain current Drain-to-Source on resistance RDS(on) vs. Tj: see fig. 17 Id < 200 A; Tj = 25 C Vds = 560V; Tj = 125 C Id = 120mA; Tj = 25 C Id = 120mA; Tj = 125 C PWM CONTROL INPUT VCOMPH ICOMP RCOMP Vout High Source Current Dynamic Resistance Isource = -0.5mA 1.5V < VCOMP < 3.5V 1.5V < VCOMP < 3.5V 3.8 -0.5 4.5 -1 9 -2.5 V mA k 13 23 700 200 16 28 V A Parameter Test Condition Min. Typ. Max. Unit
OSCILLATOR SECTION Fosc Oscillator Frequency Tj = 25 C 58 52 Dmin Dmax Min. Duty Cycle Max. Duty Cycle VCOMP = 1V VCOMP = 4V 67 70 65 65 72 74 0 73 % % kHz
DEVICE OPERATION SECTION Iop IQ Icharge Operating Supply Current Quiescent Current VCC charge Current fsw = Fosc MOS disabled Vcc = 0V to Vccon - 0.5V; Vds = 100 to 400V; Tj = 25C Vcc = 0V to Vccon - 0.5V; Vds = 100 to 400V VCCclamp VCC Clamp Voltage Vccon Vccoff Vdsmin Start Threshold voltage Min operating voltage after Turn on Drain start voltage Iclamp = 10mA (*) (*) (*) -3 4.5 3.5 -4.5 7 6 -7 mA mA mA
-2.5
-4.5
-7.5
mA
15.5 13.5 6
16.5 14.5 6.6
17.5 15.5 7.2 40
V V V V
CIRCUIT PROTECTIONS Ipklim VccOVP LEB Pulse-by-pulse Current Limit Overvoltage Protection Masking Time di/dt = 120 mA/ s Icc = 10 mA (*) After MOSFET turn-on (**) 550 15 625 16 120 700 17 mA V ns
STANDBY SECTION FSB Oscillator Frequency 19 22 25 kHz
4/19
L6590A
ELECTRICAL CHARACTERISTICS (continued)
Symbol Ipksb Ipkno Parameter Peak switch current for Standby Operation Peak switch current for Normal Operation Test Condition Transition from Fosc to FSB Transition from FSB to Fosc Min. Typ. 80 190 Max. Unit mA mA
BROWNOUT PROTECTION Vth IHys VCL Threshold Voltage Current Hysteresis Clamp Voltage Voltage either rising or falling Vpin = 3V Ipin = 0.5 mA 2.325 -30 5.6 2.5 -50 6.4 2.675 -70 7.2 V A V
THERMAL SHUTDOWN (***) Threshold Hysteresis
(*) Parameters tracking one the other (**) Parameter guaranteed by design, not tested in production (***) Parameters guaranteed by design, functionality tested in production
150
165 40
C C
5/19
L6590A
Figure 1. Start-up & UVLO Thresholds
Vcc [V]
Figure 4. IC Consumption Before Start-up
Icc [A]
15 14 13 12 11 10 9 8 7 6 -50 0 50
Tj [C]
700
Tj = -25 C
600 500
Tj = 25 C
400 300 200
100 150
Tj = 125 C
100
7
8
9
10
11
Vcc [V]
12
13
14
15
Figure 2. Start-up Current Generator
Icc [mA]
Figure 5. IC Quiescent Current
Icc [mA]
5.5
Vdrain = 40 V
4
MOSFET disabled Tj = -25 C Tj = 25 C
5 4.5 4 3.5 3
3.8 3.6 3.4 Tj = 125 C 3.2 3
Tj = -25 C
Tj = 25 C
Tj = 125 C
0
2
4
6
Vcc [V]
8
10
12
6
8
10
12
Vcc [V]
14
16
18
Figure 3. Start-up Current Generator
Icc [mA]
Figure 6. IC Operating Current
Icc [mA]
5.5
Vdrain = 60 V Tj = -25 C
5
MOSFET switching @ 65 kHz Tj = 125 C
5
Tj = 25 C
4.5
Tj = 25 C
4.5 4 4
Tj = 125 C Tj = -25 C
3.5 3
3.5
0
2
4
6
Vcc [V]
8
10
12
3
7
8
9
10
11
Vcc [V]
12
13
14
15
6/19
L6590A
Figure 7. IC Operating Current
Icc [mA]
Figure 10. OVP Threshold vs. Temperature
Vth [V]
4.4 4.2 4
Tj = 25 C MOSFET switching @ 22 kHz Tj = 125 C
16 15.8 15.6 15.4 15.2 15 -50
3.8 3.6 3.4 3.2 3 7 8 9 10 11
Vcc [V]
Tj = -25 C
12
13
14
15
0
50
Tj [C]
100
150
Figure 8. Switching Frequency vs. Temperature
fsw [kHz]
Figure 11. OCP Threshold vs. Current Slope
Ipklim / (Ipklim @ di/dt = 120 mA/s)
80 70 60
Normal operation
1.06 1.04 1.02
Tj = 25 C
50 40 30 20 10 -50 0 50
Tj [C]
1
Standby
0.98 0.96 50
100
150
100
150
dI/dt [mA/s]
200
250
Figure 9. Vcc clamp vs. Temperature
VCCclamp [V]
Figure 12. OCP threshold vs. Temperature
Ipklim / (Ipklim @ Tj = 25C)
18 17.8 17.6 17.4
Iclamp = 10 mA Iclamp = 20 mA
1.1 1.08 1.06 1.04 1.02 1 0 50
Tj [C]
di/dt = 120 mA/s
17.2 17 -50
100
150
0.98 -50
0
50
Tj [C]
100
150
7/19
L6590A
Figure 13. COMP pin Characteristic
VCOMP [V]
Figure 16. Drain Leakage vs. Drain Voltage
Idrain [A]
6 5 4 3 2
Tj = 25 C
50
Tj = 125 C
40
Tj = 25 C
30
Tj = -25 C
20 1 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 10 100 200 300 400
Vdrain [V]
500
600
700
ICOMP [mA]
Figure 14. COMP pin Dynamic Resistance vs. Temperature
RCOMP [kOhm]
Figure 17. Rds(ON) vs. Temperature
Rds(ON) / (Rds(ON) @ Tj=25C)
10.5 10
1.8 1.6 1.4
Idrain = 120 mA
9.5 9 8.5 8 -50
1.2 1 0.8 0.6 -50 0 50
Tj [C]
0
50
Tj [C]
100
150
100
150
Figure 15. Breakdown Voltage vs. Temperature
BVDSS / (BVDSS @ Tj = 25C)
Figure 18. Rds(ON) vs. Idrain
Rds(ON) / (Rds(ON) @ Idrain=120 mA)
1.08 1.06
Idrain = 200 A
1.3
Tj = 25 C
1.04 1.02 1 0.98 0.96 0.94 0.92 -50 0 50
Tj [C]
1.2
1.1
1
100
150
0.9
0
100
200
300
Idrain [mA]
400
500
600
8/19
L6590A
Figure 19. Coss vs. Drain Voltage
Coss [pF]
Figure 20. Standby Function Thresholds
Drain Peak Current [mA]
250
Tj = 25 C
220 200 180 160 140
22 kHz 65 kHz
200 150 100 50 0
120 100 80 0 100 200 300 400 500 600 700 60 -50 0 50
Tj [C]
65 kHz 22 kHz
100
150
Vdrain [V]
Figure 21. Test Board electrical schematic
F1 2A/250V CxA 100 nF L 22 mH CxB 100 nF BD1 DF06M
T1 D1 BZW06-154 D2 STTA106 R1 10
Vin 88 to 264 Vac
D4 1N5821
L1 4.7 H C8 220 F 10V Rubycon ZL
5 Vdc / 2 A
C1 22 F 400 V
C5, C6, C7 470 F 16V Rubycon ZL
R5 1.8 M
1 5
3
C2 22 F 25V
D3 1N4148 R2 560
IC1
L6590A
6, 7, 8 R6 39 k
4
C3 22 nF
OP1 PC817
4 3
1 2
R6 6.8 k
1 2 3
R5 2 k C9 100 nF IC2 TL431
R3 2.43 k
R4 2.43 k
C4 2.2 nF Y1 class
T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent 0.6 mm gap for a primary inductance of 1.4 mH Lleakage <30 H Primary : 128 T, 2 series windings 64T each, AWG32 ( 0.22 mm) Sec : 6 T, 4xAWG32 Aux : 14 T, AWG32
9/19
L6590A
Figure 22. Test Board evaluation data
Test board Load & Line regulation
Output Voltage [V] Efficiency [%]
Test Board Efficiency
80
264 VAC 88 VAC
5 4.98 4.96 4.94 4.92 4.9 0.003
220 VAC 110 VAC 88 VAC
70 60 50 40 30 20 10 0.003 0.01 0.03 0.1 0.3 1 3
110 VAC 264 VAC 220 VAC
0.01
0.03
0.1
0.3
1
3
Load Current [A]
Load Current [A]
Test Board Light-load Consumption
Input Power [mW]
Pdiss [W]
Device Power Dissipation
5
Pout
1,200 1,000 800 600 400 200 0 50 100 150 200 250 300 350
0W 0.25W 0.1W 0.05W 0.5W
Rthj-amb= 58 C/W @ 1.5W 2 1 0.5 0.2 0.1 220 VAC 264 VAC
88 VAC
110 VAC
400
450
0.05 0.003
0.01
0.03
0.1
0.3
1
3
DC Input Voltage [V]
Load Current [A]
Figure 23. Test Board EMI characterization
10/19
L6590A
Figure 24. Test Board main waveforms
Ch1: Vdrain A1: Idrain
Vin = 100 VDC Iout = 2 A A1: Idrain Ch1: Vdrain
Vin = 400 VDC Iout = 2 A
A1: Idrain A1: Idrain Vin = 100 VDC Iout = 50 mA Vin = 400 VDC Iout = 50 mA
Ch1: Vdrain
Ch1: Vdrain
Figure 25. Test Board load transient response
Vout
Vout
Iout
Standby Function is not tripped
Standby Function is tripped
Vin = 200 VDC Iout = 0.2 0.4 A
Iout
transition 22 65 kHz
transition 65 22 kHz
Vin = 200 VDC Iout = 0.1 0.3 A
11/19
L6590A
APPLICATION INFORMATION In the following sections the functional blocks as well as the most important internal functions of the device will be described. Start-up circuit When power is first applied to the circuit and the voltage on the bulk capacitor is sufficiently high, an internal high-voltage current generator is sufficiently biased to start operating and drawing about 4.5 mA through the primary winding of the transformer and the drain pin. Most of this current charges the bypass capacitor connected between pin Vcc (3) and ground and makes its voltage rise linearly. As the Vcc voltage reaches the start-up threshold (14.5V typ.) the chip, after resetting all its internal logic, starts operating, the internal power MOSFET is enabled to switch and the internal high-voltage generator is disconnected. The IC is powered by the energy stored in the Vcc capacitor until the self-supply circuit (typically an auxiliary winding of the transformer) develops a voltage high enough to sustain the operation. As the IC is running, the supply voltage, typically generated by a self-supply winding, can range between 16 V (Overvoltage protection limit, see the relevant section) and 7 V, threshold of the Undervoltage Lockout. Below this value the device is switched off (and the internal start-up generator is activated). The two thresholds are in tracking. The voltage on the Vcc pin is limited at safe values by a clamp circuit. Its 17V threshold tracks the Overvoltage protection threshold. Figure 26. Start-up circuit internal schematic
DRAIN
15 M
POWER MOSFET
UVLO
Vcc
150
17 V
L6590A
GND
Power MOSFET and Gate Driver The power switch is implemented with a lateral N-channel MOSFET having a V(BR)DSS of 700V min. and a typical RDS(on) of 13. It has a SenseFET structure to allow a virtually lossless current sensing (used only for protection). During operation in Discontinuous Conduction Mode at low mains the drain voltage is likely to go below ground. Any risk of injecting the substrate of the IC is prevented by an internal structure surrounding the switch. The gate driver of the power MOSFET is designed to supply a controlled gate current during both turn-on and turn-off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned on accidentally.
12/19
L6590A
Figure 27. PWM Control internal schematic
Max. Duty cycle
S OSCILLATOR
Clock
R Q to gate driver
+ PWM -
from OCP comparator
L6590A
1 mA COMP
Oscillator and PWM Control PWM regulation is accomplished by implementing voltage mode control. As shown in fig. 27, this block includes an oscillator, a PWM comparator, a PWM latch and a PWM control input. The oscillator operates at a frequency internally fixed at 65 kHz with a precision of 10%. This value has been selected so that the second harmonic falls below 150 kHz, beyond which some international standards envisage more severe limits. The maximum duty cycle is limited at 70% typ. The PWM latch (reset dominant) is set by the clock pulses of the oscillator and is reset by either the PWM comparator or the Overcurrent comparator. The inverting input of the PWM comparator is externally available (pin 4, COMP) in order for an optocoupler-based circuit to close the control loop that regulates the converter's output voltage. In case of overcurrent the voltage at pin COMP saturates high and the conduction of the power MOSFET is stopped by the OCP comparator instead of the PWM comparator. Under zero load conditions the COMP pin is close to its low saturation and the gate drive delivers as short pulses as it can, limited by internal delays. They are however too long to maintain the long-term energy balance, thus from time to time some cycles need being skipped and the operation becomes asynchronous. This is automatically done by the control loop. Standby Function The standby function, optimized for flyback topology, automatically detects a light load condition for the converter and decreases the oscillator frequency. The normal oscillation frequency is automatically resumed when the output load builds up and exceeds a defined threshold. This function allows to minimize power losses related to switching frequency, which represent the majority of losses in a lightly loaded flyback, without giving up the advantages of a higher switching frequency at heavy load. The Standby function is realized by monitoring the peak current in the power switch. If the load is low that it does not reach a threshold (80 mA typ.), the oscillator frequency will be set at 22 kHz typ. When the load demands more power and the peak primary current exceeds a second threshold (190 mA typ.) the oscillator frequency is reset at 65 kHz. This 110 mA hysteresis prevents undesired frequency change when power is such that the peak current is close to either threshold. The signal coming from the sense circuit is digitally filtered to avoid false triggering of this function as a result of large load changes or noise.
13/19
L6590A
Figure 28. Standby Function timing diagram
Pout
Peak Primary Current
00000000000000000000000000000000000000000000 80 mA 190 mA 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000 00000000000000000000000000000000000000000000
Load regulation
Vout
small glitch
STANDBY (before filter)
2 ms
1 ms
STANDBY (filtered)
fsw
65 kHz 22 kHz
Brownout Protection Brownout Protection is basically a not-latched device shutdown functionality. It will typically be used to detect a mains undervoltage (brownout). This condition may cause overheating of the primary power section due to an excess of RMS current. Figure 29. Brownout Function internal schematic and timing diagram
HV Input bus VON VOFF
HV Input bus Vcc
VinOK
50 A BOK
+
6.4 V
Vcc
VinOK
-
2.5 V
L6590A
PWM
00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000 00000000000000000000
Vout
14/19
L6590A
Another problem is the spurious restarts that are likely to occur during converter power down if the input voltage decays slowly (e.g. with a large input bulk capacitor) and that cause the output voltage not to decay to zero monothonically. Converter shutdown can be accomplished with the L6590A by means of an internal comparator that can be used to sense the voltage across the input bulk capacitor. This comparator is internally referenced to 2.5V and disables the PWM if the voltage applied at its non-inverting input, externally available, is below the reference. PWM operation is re-enabled as the voltage at the pin is more than 2.5V. The brownout comparator is provided with current hysteresis instead of a more usual voltage hysteresis: an internal 50 A current generator is ON as long as the voltage applied at the non-inverting input exceeds 2.5V and is OFF if the voltage is below 2.5V. This approach provides an additional degree of freedom: it is possible to set the ON threshold and the OFF threshold separately by properly choosing the resistors of the external divider, which is not possible with voltage hysteresis. Overvoltage Protection The IC incorporates an Overvoltage Protection (OVP) that can be particularly useful to protect the converter and the load against voltage feedback loop failures. This kind of failure causes the output voltage to rise with no control and easily leads to the destruction of the load and of the converter itself if not properly handled. If such an event occurs, the voltage generated by the auxiliary winding that supplies the IC will fly up tracking the output voltage. This will activate an internal clamp circuit and, as the current sunk by this clamp exceeds about 10 mA, the operation of the IC will be stopped. This condition is latched and maintained until the Vcc voltage falls below the UVLO threshold. The converter will then operate intermittently. Figure 30. OVP internal schematic
Vcc
DRAIN to MOSFET
CLAMP
+
to OVP latch
OVP
-
GND
L6590A
Overcurrent Protection The device uses pulse-by-pulse current limiting for Overcurrent Protection (OCP), in order to prevent overstress of the internal MOSFET: its current during the ON-time is monitored and, if it exceeds a determined value, the conduction is terminated immediately. The MOSFET will be turned on again in the subsequent switching cycle. As previously mentioned, the internal powerMOSFET has a SenseFET structure: the source of a few cells are connected together and kept separate from the other source connections so as to realize a 1:100 current divider. The "sense" portion is connected to a ground referenced, sense resistor having a low thermal coefficient. The OCP comparator senses the voltage drop across the sense resistor and resets the PWM latch if the drop exceeds a threshold, thus turning off the MOSFET. In this way the overcurrent threshold is set at about 0.65 A (typical value).
15/19
L6590A
At turn-on, there are large current spikes due to the discharge of parasitic capacitances and, in case of Continuos Conduction Mode operation, to secondary diode reverse recovery as well, which could falsely trigger the OCP comparator. To increase noise immunity the output of the OCP comparator is blanked for a short time (about 120 ns) just after the MOSFET is turned on, so that any disturbance within this time slot is rejected (Leading Edge Blanking). Figure 31. OCP internal schematic
DRAIN Max. Duty cycle
S OSCILLATOR Clock R Q
Driver
1 1/100
+ PWM + OCP -
Rsense
Clock
LEB
0.5 V GND
Thermal Shutdown Overheating of the device due to an excessive power throughput or insufficient heatsinking is avoided by the Thermal Shutdown function. A thermal sensor monitors the junction temperature close to the power MOSFET and, when the temperature exceeds 150 C (min.), sets an alarm signal that stops the operation of the device. This is a not-latched funtion and the power MOSFET is re-enabled as the temperature falls about 40 C.
16/19
L6590A
APPLICATION IDEAS Figure 32. 15W Auxiliary SMPS for PC
Vin = 200 to 375 Vdc D1 BZW06-154 D2 STTA106 R1 10 R2 1.8 M
1 3
T1
D4 STPS10L25D
L1 4.7 H
5 Vdc / 3 A
C5, C6, C7 470 F 10 V
C8 100 F 10V
C2 22 F 25 V
D3 1N4148 R4 560 R5 2.43 k
IC1
5
L6590A
6, 7, 8
4
C3 47 nF
4
1
C1 10 nF
OP1 PC817
3 2
R3 20 k
R7 240 C9 470 nF IC2 TL431 R6 2.43 k
1
3
C4 2.2 nF Y
2
T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent 0.9 mm gap for a primary inductance of 2 mH Lleakage <50 H Primary : 200 T, 2 series windings 100T each, AWG33 ( 0.22 mm) Sec : 9 T, 2 x AWG23 ( 0.64 mm) Aux : 21 T, AWG33
Figure 33. 10W AC-DC Adapter
F1 2A/250V CxA 100 nF L 22 mH CxB 100 nF BD1 DF06M
Vin 88 to 264 Vac
T1 C1 22 F 400 V D1 BZW06-154 D2 STTA106 R1 10
D4 STPS3L60S
L1 4.7 H
12 Vdc / 0.8 A
C6, C7 330 F 16 V
C8 100 F 16 V
R5 1 k
R2 1.8 M
1 3
C2 22 F 25 V
D3 1N4148 R4 100
IC1
5
L6590A
6, 7, 8
4
C4 47 nF
4
1
C3 10 nF
OP1 PC817
3 2
R3 39 k
T1 specification Core E20/10/6, ferrite 3C85 or N67 or equivalent 0.5 mm gap for a primary inductance of 1.6 mH Lleakage <30 H Primary : 130 T, 2 series windings 65T each, AWG33 ( 0.22 mm) Sec : 14 T, AWG26 ( 0.4 mm) Aux : 14 T, AWG33
C5 2.2 nF Y
D5 BZX79C10
REFERENCES [1] "Getting Familiar with the L6590 Family, High-voltage Fully Integrated Power Supply" (AN1261) [2] "Offline Flyback Converters Design Methodology with the L6590 Family" (AN1262)
17/19
L6590A
18/19
L6590A
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2000 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
(R)
19/19

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